Reed Solomon (RS) codes are widely used to protect the information from errors in transmission and storage systems. The RS codes popularity is not only related to its multiple error correcting capability but also to its superb information rate for extremely long wordlength. Most of the RS coders are based on GF(2^8) Galois fields and uses a byte to encode a symbol and provides codewords up to 255 symbols. Codewords with more than 255 symbols can be constructed by using GF(2^m) Galois Fields with m > 8. This choice increases the complexity of the basic arithmetic operations in the field and also the complexity of the encoding and decoding algorithms. In fact, the algorithm complexity grows with the number of symbols in the codeword. This limitation, can be superseded introducing Parity Sharing (PS) RS codes that are characterized by a greater flexibility in terms of design parameters. Consequently, a designer can choose between different PS codes implementations in order to meet requirements such as Bit Error Rate (BER), hardware complexity, speed and throughput. This paper analyzes the performance of PS codes in terms of obtainable error rate with respect to the code parameters and provides a performance evaluation of the related hardware implementations. The BER evaluation has been carried out taking into account either the random error and the erasure rates as two independent probabilities. This approach provides an evaluation that is independent by the communication channel characteristics and extends the results to memory systems in which permanent faults and transient faults can be modeled respectively as erasures and random errors.