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A Low Power 6-Bit A/D Converter Achieving 10-Bit Resolution for MEMS Sensor Interface Using Time-Interleaved Delta Modulation
Hyderabad, India January 03-January 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VLSID.2006.1419th International Conference on VLSI ...
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Koushik De, Qualcore Logic Limited
Santiram Kal, Indian Institute of Technology - Kharagpur
This paper describes time-interleaved delta ADC as a digital interface for low frequency MEMS sensor signal. The design is presented as a simple low power solution for A/D conversion in comparison to popular sigma-delta converters. Conventional delta modulator is modified with insertion of an array of comparators and a coder i.e. an up/down counter. Time interleaving is done within the array to operate the sensitive analog part in slower speed while maintaining a higher oversampling ratio of the converter. The up/down counter acts as low-pass filter in the delta modulation loop and by resetting it in proper interval decimation can also be performed. Simulation of the test structure for the 6-bit ADC in 0.18 ?m CMOS process shows output SNR of 60dB, with INL and DNLs less than 0.5 LSB. The output SNR is equivalent to 10-bit of resolution. To obtain such resolution with only 6-bit output the total power the design consumes from a single 1.8 V supply is only 2.3mW. The die area of the ADC is only 0.8mm ?0.6mm.
Citation:
Koushik De, Santiram Kal, "A Low Power 6-Bit A/D Converter Achieving 10-Bit Resolution for MEMS Sensor Interface Using Time-Interleaved Delta Modulation," vlsid, pp.75-80, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006
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