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Frame Based Fair Multiprocessor Scheduler: A Fast Fair Algorithm for Real-Time Embedded Systems
Hyderabad, India January 03-January 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VLSID.2006.9019th International Conference on VLSI ...
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Arnab Sarkar, Indian Institute of Technology - Kharagpur
P. P. Chakrabarti, Indian Institute of Technology - Kharagpur
Rajeev Kumar, Indian Institute of Technology - Kharagpur
This paper presents Frame Based Fair Multiprocessor Scheduler (FBFMS) which provides accurate real-time proportional fair scheduling for a set of dynamic tasks on a symmetric multiprocessor environment with O(1) scheduling overhead. FBFMS meets these seemingly contradictory goals by applying the benefits of Virtual Time Round- Robin scheduling mechanism along with a frame based scheduling approach. Simulation results show that the algorithm provides 2.5 to 26 times speedup (over O(lg n) complexity schedulers) with distortion in fairness less than 1% in most cases, and less than 15% in the worst case.
Citation:
Arnab Sarkar, P. P. Chakrabarti, Rajeev Kumar, "Frame Based Fair Multiprocessor Scheduler: A Fast Fair Algorithm for Real-Time Embedded Systems," vlsid, pp.677-682, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006
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