Modern embedded systems are often associated with stringent performance, cost and power constraints. Hence, designing such systems involve guaranteeing that these constraints are met, apart from the usual functional validation. Such systems typically consist of a heterogeneous collection of processors, specialized memory subsystems, and partially programmable or fixed-function components. This heterogeneity, coupled with issues such as hardware/software partitioning, mapping, scheduling, etc., leads to a large number of design possibilities, thereby making performance debugging of such systems a difficult problem. This tutorial will provide a comprehensive overview of the recent developments on this front, with focus on timing analysis. In particular we will cover the following issues.