loading...
A Built-in Self-Test Method for Write-only Content Addressable Memories
Palm Springs, California May 01-May 05
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2005.723rd IEEE VLSI Test Symposium (VTS'05)
 This Article 
 
PDF
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Dilip K. Bhavsar, Intel Corporation
A novel and pragmatic Built-in Self Test technique provides cost-effective and thorough testing and diagnosis of content addressable memories (CAMs). The method is particularly attractive for write-only CAMs, as neither the presence of a read port nor direct observability of CAM match -lines are required or testing. The underlying test algorithm uniquely exploits little known inherent properties of pseudorandom patterns generated by linear feedback shift registers in a test-time and hardware-efficient BIST implementation.
Citation:
Dilip K. Bhavsar, "A Built-in Self-Test Method for Write-only Content Addressable Memories," vts, pp.9-14, 23rd IEEE VLSI Test Symposium (VTS'05), 2005
Usage of this product signifies your acceptance of the Terms of Use.