BIST for Network-on-Chip Interconnect Infrastructures

Berkeley, California April 30-May 04

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http://doi.ieeecomputersociety.org/10.1109/VTS.2006.22

24th IEEE VLSI Test Symposium

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	Cristian Grecu, Partha Pande, Andr? Ivanov, Res Saleh, "BIST for Network-on-Chip Interconnect Infrastructures," VLSI Test Symposium, IEEE, pp. 30-35, 24th IEEE VLSI Test Symposium, 2006.

	BibTex	x
	@article{ 10.1109/VTS.2006.22, author = {Cristian Grecu and Partha Pande and Andr? Ivanov and Res Saleh}, title = {BIST for Network-on-Chip Interconnect Infrastructures}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {2006}, isbn = {0-7695-2514-8}, pages = {30-35}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTS.2006.22}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - BIST for Network-on-Chip Interconnect Infrastructures SN - 0-7695-2514-8 SP30 EP35 A1 - Cristian Grecu, A1 - Partha Pande, A1 - Andr? Ivanov, A1 - Res Saleh, PY - 2006 KW - built-in self-test KW - network-on-chip KW - interconnect infrastructure KW - unicast test KW - multicast test. VL - 0 JA - VLSI Test Symposium, IEEE ER -

Cristian Grecu, University of British Columbia, Canada

Partha Pande, Washington State University

Andr? Ivanov, University of British Columbia, Canada

Res Saleh, University of British Columbia, Canada

In this paper, we present a novel built-in self-test methodology for testing the inter-switch links of network-on-chip (NoC) based chips. This methodology uses a high-level fault model that accounts for crosstalk effects due to inter-wire coupling. The novelty of our approach lies in the progressive reuse of the NoC infrastructure to transport test data to its own components under test in a bootstrap manner, and in extensively exploiting the inherent parallelism of the data transport mechanism to reduce the test time and implicitly the test cost.

Index Terms:

built-in self-test, network-on-chip, interconnect infrastructure, unicast test, multicast test.

Citation:

Cristian Grecu, Partha Pande, Andr? Ivanov, Res Saleh, "BIST for Network-on-Chip Interconnect Infrastructures," vts, pp.30-35, 24th IEEE VLSI Test Symposium, 2006

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