In this paper, an algorithm for scan vector ordering, PEAKASO, is proposed to minimize the peak temperature during scan testing. Given a circuit with scan and the scan vectors, hotspot is predicted by window-based power analysis. The peak temperature on the hotspot is minimized by global scan vector ordering which expedites heat dissipation to ambient air through large thermal gradient. Further peak temperature reduction is achieved by local scan vector reordering based on overheat precompensation. As an output, PEAKASO provides a scan vector order with lower peak temperature. Note that the scan vectors themselves are not changed at all (only the order is changed), and thus there is no impact on fault coverage and no design overhead. Experimental results on benchmark circuits show that 4.3 - 9.7% peak temperature reduction can be achieved, compared with a scan vector order that is optimized only for average power consumption. Such temperature reduction can be very significant in terms of test time reduction (by 40-60%) under the same peak temperature constraint.