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A Gate-Level Method for Transistor-Level Bridging Fault Diagnosis
Berkeley, California April 30-May 04
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2006.624th IEEE VLSI Test Symposium
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Xinyue Fan, Oxford University, UK
Will Moore, Oxford University
Camelia Hora, Philips Research Labs
Mario Konijnenburg, Philips Research Labs
Guido Gronthoud, Philips Research Labs
The paper addresses the issue of transistor-level bridging fault diagnosis. While most of the previous bridging fault diagnosis work focuses on the gate-level bridging faults, this method provides a solution to intragate bridging faults diagnosis for the first time. Instead of using any transistor level simulation tools, we develop a transformation technique that allows transistor-level bridging faults to be diagnosed by the commonly used gate-level bridging faults diagnosis tools. Real diagnosis results from Philips designs are presented.
Citation:
Xinyue Fan, Will Moore, Camelia Hora, Mario Konijnenburg, Guido Gronthoud, "A Gate-Level Method for Transistor-Level Bridging Fault Diagnosis," vts, pp.266-271, 24th IEEE VLSI Test Symposium, 2006
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