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Session Abstract
Berkeley, California April 30-May 04
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2006.6724th IEEE VLSI Test Symposium
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Yervant Zorian, Virage Logic
Dennis Wassung, Canaccord Adams
While test technology is directly linked into semiconductor manufacturing, the incorporation of test solutions into the design needs to take place during different stages of chip design flow. These distributed DFT efforts start from IP design stages and end up at the final tape-out stage. As the electronic design automation flow expands from both ends front and back, and as the testability requirements for third party IP acquisition matures, where should the future of DFT industry be? Would it be in point tools plugged into different stages of the design flow? or would it be an integral part of the IP delivery? or would it be merged into adjacent design automation solutions? How would this impact on the future of DFT, as an industry sector? This panel will look at the changing requirements in this test technology sector and its business implications.
Citation:
Yervant Zorian, Dennis Wassung, "Session Abstract," vts, pp.154-155, 24th IEEE VLSI Test Symposium, 2006
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