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Scan-Chain Reordering for Minimizing Scan-Shift Power Based on Non-Specified Test Cubes
April 27-May 01
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2008.1626th IEEE VLSI Test Symposium (vts 2008)
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This paper proposes a scan-cell reordering scheme, named ROBPR, to reduce the signal transitions during test mode while preserving the don’t-care bits in the test patterns for a later optimization. Combined with a pattern-filling technique, the proposed scheme utilizes both response correlation and pattern correlation to simultaneously minimize scan-out and scan-in transitions. A series of experiments demonstrate the effectiveness and superiority of the proposed scheme on reducing total scan-shift transitions. The trade-off between our power-driven scan-cell reordering and a routing-driven scan-cell reordering is discussed based on experiments as well.
Index Terms:
correlation, scan-chain, reordering, signal transitions
Citation:
Yu-Ze Wu, Mango C.-T. Chao, "Scan-Chain Reordering for Minimizing Scan-Shift Power Based on Non-Specified Test Cubes," vts, pp.147-154, 26th IEEE VLSI Test Symposium (vts 2008), 2008
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