loading...
How Many Test Patterns are Useless?
April 27-May 01
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2008.2726th IEEE VLSI Test Symposium (vts 2008)
 This Article 
 
PDF
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Studies by previous researchers using production test data reported that not all the production test patterns applied detected defective chips. Researchers found that 70% to 90% of their production test patterns seemed useless because these patterns detected no defective chips and they could therefore be removed without impacting test quality. Previous researchers qualitatively explained this finding by a lack of correlation between test metrics and defect coverage. Notwithstanding the lack of correlation between test metrics and defect coverage, in this paper we develop a simple statistical model that relates the expected number of useless patterns to the production yield, the defect coverage characteristics, and the number of tested chips. This model demonstrates that for practical values of production yield, defect coverage and number of chips tested, a significant fraction of test patterns will be useless. We validated this statistical model by comparing its results with actual production testing data.
Index Terms:
Test Patterns, Truncation, Test Economics
Citation:
Fran?ois-Fabien Ferhani, Nirmal R. Saxena, Edward J. McCluskey, Phil Nigh, "How Many Test Patterns are Useless?," vts, pp.23-28, 26th IEEE VLSI Test Symposium (vts 2008), 2008
Usage of this product signifies your acceptance of the Terms of Use.